
R
Chapter 13
DDR2 SDRAM
The Spartan ? -3A/3AN FPGA Starter Kit board includes a 512 Mbit (32M x 16) Micron
Technology DDR2 SDRAM (MT47H32M16) with a 16-bit data interface, as shown in
Figure 13-1 .
5.0V
REG2
SW1
SW2
LDO2
0.9V
1.8V
1.8V
(SSTL_18 Termination Voltage)
(DDR2 SDRAM Supply Voltage)
National
Semiconductor
LP3906
Regulator
0.9V
(SSTL_18 Reference Voltage)
FPGA
SD_A<15:0>
See Table
Micron 512Mb
DDR2 SDRAM
A[12:0 ]
(H7)
(J1)
(J8)
(L8)
(N1)
(R6)
(T1)
(T6)
VCCO_3
See Table
See Table
(M3)
(M4)
(N4)
(E3)
(J5)
(K6)
(J3)
(K2)
(K3)
(M5)
(N3)
(M2)
(M1)
(P1)
SD_DQ<15:0>
SD_BA<2:0>
SD_RAS
SD_CAS
SD_WE
SD_UDM
SD_UDQS_N
SD_UDQS_P
SD_LDM
SD_LDQS_N
SD_LDQS_P
SD_CS
SD_CKE
SD_CK_N
SD_CK_P
SD_ODT
DQ[15:0]
BA[1:0]
RAS#
CAS#
WE#
UDM
UDQS#
UDQS
LDM
LDQS#
LDQS
CS#
CKE
CK#
CK
ODT
VREF
VDD
VDDQ
(H4)
SD_LOOP
(H3)
UG334_c13_01_052407
Figure 13-1:
FPGA Interface to Micron 512 Mbit DDR2 SDRAM
UG334 (v1.1) June 19, 2008
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